My primary focus lies in applying Generative AI to memory workload synthesis and trace-based simulation. Recently, our paper “Memory Workload Synthesis Using Generative AI” (co-authored with [co-authors, etc.] and accepted at MEMSYS 2023) showcased the first use of large language models in constructing shortened yet representative microbenchmarks from raw program traces. The study compared three learning-based methods (Tab-Base, Tab-RD, Tab-IC) with existing techniques like HRD and STM, demonstrating that AI-based approaches can yield accuracy on par or better—while highlighting the importance of domain insights such as reuse distance.
Notably, this work received the Best Paper Award at MEMSYS 2023. Key findings include:
Another upcoming paper, “Efficient Trace Reduction via Transformer-Based IPC Imputation and Change Point Detection”, currently under review, proposes a new technique called VitaBeta. This method uses:
Compared to baseline sampling methods (SimPoint, BarrierPoint, etc.), VitaBeta further reduces redundancies in short-yet-complex HPC workloads. We’re especially excited about its compatibility with standard trace formats and its ability to integrate with widely used simulators like ChampSim.
Interested in these areas (or bridging them)? Feel free to engage with me directly at cshiai@connect.ust.hk. I’m eager to explore new frontiers in HPC, AI, and advanced instrumentation.
Below are selected publications spanning memory-system design and electron microscopy. For a full list or inquiries, feel free to reach out to me at cshiai@connect.ust.hk.